The present invention generally relates to semiconductor structures, and particularly to a multi-chip stacked semiconductor structure including a power connector/decoupler integrated in a heat sink, and methods of manufacturing the same.
One of the impediments limiting three-dimensional integration of stacked semiconductor chips is the simultaneous requirement of heat removal from stacked semiconductor chips and application of power to the stacked semiconductor chips at the same time. One side of the stacked semiconductor chips is used for mounting the stack to a packaging substrate. The opposite side of the stacked semiconductor chip is typically employed to provide a set of radiator fins that eradiate heat, thereby increasing the maximum operational power consumption for the stacked semiconductor chip.
The number of electrical connections between the stacked semiconductor chips and the packaging substrate is limited by the number of solder connections between the packaging substrate and the bottommost semiconductor chip in the stack of semiconductor chips. The pitch of the array employed for the solder balls may be from 100 microns to 300 microns, and the total number of solder balls is typically limited to a number less than 10,000. Many of the solder balls are employed for providing electrical power or electrical grounding to the stacked semiconductor chips, thereby limiting the number of solder balls that may be employed to transmit input signals and output signals. To improve the functionality and to enable stacking of a large number of semiconductor chips, the number of solder pads available for transmitting input and output signals need to be increased, while the power generated from the stacked semiconductor chips need to be adequately dissipated.